Erasure enhancement technique in flash EEPROM by pulsed gate-drain erasure (PGDE).

MLA

Hsu, and S. Shumway. “Erasure Enhancement Technique in Flash EEPROM by Pulsed Gate-Drain Erasure (PGDE).” Electronics Letters (Institution of Engineering & Technology), vol. 31, no. 14, July 1995, pp. 1195–96. EBSCOhost, https://doi.org/10.1049/el:19950817.

APA

Hsu, & Shumway, S. (1995). Erasure enhancement technique in flash EEPROM by pulsed gate-drain erasure (PGDE). Electronics Letters (Institution of Engineering & Technology), 31(14), 1195–1196. https://doi.org/10.1049/el:19950817

Chicago

Hsu, and S. Shumway. 1995. “Erasure Enhancement Technique in Flash EEPROM by Pulsed Gate-Drain Erasure (PGDE).” Electronics Letters (Institution of Engineering & Technology) 31 (14): 1195–96. doi:10.1049/el:19950817.