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3-D Packaging With Through-Silicon Via (TSV) for Electrical and Fluidic Interconnections.

Authors :
Khan, Navas
Yu, Li Hong
Pin, Tan Siow
Ho, Soon Wee
Kripesh, Vaidyanathan
Pinjala, Damaruganath
Lau, John H.
Chuan, Toh Kok
Source :
IEEE Transactions on Components, Packaging & Manufacturing Technology; Feb2013, Vol. 3 Issue 2, p221-228, 8p
Publication Year :
2013

Abstract

In this paper, a liquid cooling solution has been reported for 3-D package in package-on-package format. A high heat dissipating chip is mounted on a silicon carrier, which has copper through-silicon via (TSV) for electrical interconnection and hollow TSV for fluidic circulation. Heat transfer enhancement structures have been embedded in the chip carrier. Cooling liquid, de-ionized water is circulated through the chip carrier and heat from the chip is extracted. The fluidic channels are isolated from electrical traces using hermetic sealing. The research work has demonstrated liquid cooling solution for 100 W from one stack and total of 200 W from two stacks of the package. The fluidic interconnections and sealing techniques have been discussed. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
21563950
Volume :
3
Issue :
2
Database :
Complementary Index
Journal :
IEEE Transactions on Components, Packaging & Manufacturing Technology
Publication Type :
Academic Journal
Accession number :
85276997
Full Text :
https://doi.org/10.1109/TCPMT.2012.2186297