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On improved graph-based alternative wiring scheme for multi-level logic optimization.

Authors :
Wu, Y.-L.
Sze, C.-N.
Cheung, C.-C.
Fan, H.
Source :
ICECS 2000. 7th IEEE International Conference on Electronics, Circuits & Systems (Cat. No.00EX445); 2000, p654-654, 1p
Publication Year :
2000

Details

Language :
English
ISBNs :
9780780365421
Database :
Complementary Index
Journal :
ICECS 2000. 7th IEEE International Conference on Electronics, Circuits & Systems (Cat. No.00EX445)
Publication Type :
Conference
Accession number :
82016030
Full Text :
https://doi.org/10.1109/ICECS.2000.912962