Back to Search Start Over

An AVPG for SOC design verification with port order fault model.

Authors :
Chun-Yao Wang
Shing-Wu Tung
Jing-Yang Jou
Source :
ISCAS 2001. the 2001 IEEE International Symposium on Circuits & Systems (Cat. No.01CH37196); 2001, p259-259, 1p
Publication Year :
2001

Details

Language :
English
ISBNs :
9780780366855
Database :
Complementary Index
Journal :
ISCAS 2001. the 2001 IEEE International Symposium on Circuits & Systems (Cat. No.01CH37196)
Publication Type :
Conference
Accession number :
81812233
Full Text :
https://doi.org/10.1109/ISCAS.2001.922034