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Reducing Power Consumption of an Embedded DSP Platform through the Clock-Gating Technique.
- Source :
- 2010 International Conference on Field Programmable Logic & Applications (FPL); 2010, p336-339, 4p
- Publication Year :
- 2010
Details
- Language :
- English
- ISBNs :
- 9781424478422
- Database :
- Complementary Index
- Journal :
- 2010 International Conference on Field Programmable Logic & Applications (FPL)
- Publication Type :
- Conference
- Accession number :
- 81391636
- Full Text :
- https://doi.org/10.1109/FPL.2010.73