Cite
Area/delay estimation for digital signal processor cores.
MLA
Miyaoka, Y., et al. “Area/Delay Estimation for Digital Signal Processor Cores.” Proceedings of the ASP-DAC 2001. Asia & South Pacific Design Automation Conference 2001 (Cat. No.01EX455), Jan. 2001, pp. 156–61. EBSCOhost, https://doi.org/10.1109/ASPDAC.2001.913297.
APA
Miyaoka, Y., Kataoka, Y., Togawa, N., Yanagisawa, M., & Ohtsuki, T. (2001). Area/delay estimation for digital signal processor cores. Proceedings of the ASP-DAC 2001. Asia & South Pacific Design Automation Conference 2001 (Cat. No.01EX455), 156–161. https://doi.org/10.1109/ASPDAC.2001.913297
Chicago
Miyaoka, Y., Y. Kataoka, N. Togawa, M. Yanagisawa, and T. Ohtsuki. 2001. “Area/Delay Estimation for Digital Signal Processor Cores.” Proceedings of the ASP-DAC 2001. Asia & South Pacific Design Automation Conference 2001 (Cat. No.01EX455), January, 156–61. doi:10.1109/ASPDAC.2001.913297.