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Scalability of Ni FUSI gate processes: phase and Vt control to 30 nm gate lengths.

Authors :
Kittl, J.A.
Veloso, A.
Lauwers, A.
Anil, K.G.
Demeurisse, C.
Kubicek, S.
Niwa, M.
van Dal, M.J.H.
Richard, O.
Pawlak, M.A.
Jurczak, M.
Vrancken, C.
Chiarella, T.
Brus, S.
Maex, K.
Biesemans, S.
Source :
2005 Digest of Technical Papers. 2005 Symposium on VLSI Technology; 2005, p72-73, 2p
Publication Year :
2005

Details

Language :
English
ISBNs :
9784900784000
Database :
Complementary Index
Journal :
2005 Digest of Technical Papers. 2005 Symposium on VLSI Technology
Publication Type :
Conference
Accession number :
81129022
Full Text :
https://doi.org/10.1109/.2005.1469217