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A unified FinFET reliability model including high K gate stack dynamic threshold voltage, hot carrier injection, and negative bias temperature instability.
- Source :
- 2009 10th International Symposium on Quality Electronic Design; 2009, p7-12, 6p
- Publication Year :
- 2009
Details
- Language :
- English
- ISBNs :
- 9781424429523
- Database :
- Complementary Index
- Journal :
- 2009 10th International Symposium on Quality Electronic Design
- Publication Type :
- Conference
- Accession number :
- 81063779
- Full Text :
- https://doi.org/10.1109/ISQED.2009.4810262