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A methodology for design, modeling, and analysis of networks-on-chip.

Authors :
Jiang Xu
Wolf, W.
Henkel, J.
Chakradhar, S.
Source :
2005 IEEE International Symposium on Circuits & Systems; 2005, p1778-1778, 1p
Publication Year :
2005

Details

Language :
English
ISBNs :
9780780388345
Database :
Complementary Index
Journal :
2005 IEEE International Symposium on Circuits & Systems
Publication Type :
Conference
Accession number :
80793145
Full Text :
https://doi.org/10.1109/ISCAS.2005.1464953