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Device-conscious circuit designs for 0.5-V high-speed memory-rich nanoscale CMOS LSIs.

Authors :
Kotabe, A.
Itoh, K.
Takemura, R.
Tsuchiya, R.
Horiguchi, M.
Source :
2011 IEEE Custom Integrated Circuits Conference (CICC); 2011, p1-7, 7p
Publication Year :
2011

Details

Language :
English
ISBNs :
9781457702228
Database :
Complementary Index
Journal :
2011 IEEE Custom Integrated Circuits Conference (CICC)
Publication Type :
Conference
Accession number :
80279852
Full Text :
https://doi.org/10.1109/CICC.2011.6055313