Multichip Self-Assembly Technology for Advanced Die-to-Wafer 3-D Integration to Precisely Align Known Good Dies in Batch Processing.

MLA

Fukushima, Takafumi, et al. “Multichip Self-Assembly Technology for Advanced Die-to-Wafer 3-D Integration to Precisely Align Known Good Dies in Batch Processing.” IEEE Transactions on Components, Packaging & Manufacturing Technology, vol. 1, no. 12, Dec. 2011, pp. 1873–84. EBSCOhost, https://doi.org/10.1109/TCPMT.2011.2160266.

APA

Fukushima, T., Iwata, E., Ohara, Y., Murugesan, M., Bea, J., Lee, K., Tanaka, T., & Koyanagi, M. (2011). Multichip Self-Assembly Technology for Advanced Die-to-Wafer 3-D Integration to Precisely Align Known Good Dies in Batch Processing. IEEE Transactions on Components, Packaging & Manufacturing Technology, 1(12), 1873–1884. https://doi.org/10.1109/TCPMT.2011.2160266

Chicago

Fukushima, Takafumi, Eiji Iwata, Yuki Ohara, Mariappan Murugesan, Jichoel Bea, Kangwook Lee, Tetsu Tanaka, and Mitsumasa Koyanagi. 2011. “Multichip Self-Assembly Technology for Advanced Die-to-Wafer 3-D Integration to Precisely Align Known Good Dies in Batch Processing.” IEEE Transactions on Components, Packaging & Manufacturing Technology 1 (12): 1873–84. doi:10.1109/TCPMT.2011.2160266.