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Threadmill: A Post-Silicon Exerciser for Multi-Threaded Processors.

Authors :
Adir, Allon
Golubev, Maxim
Landa, Shimon
Nahir, Amir
Shurek, Gil
Sokhin, Vitali
Ziv, Avi
Source :
DAC: Annual ACM/IEEE Design Automation Conference; Jun2011, p860-865, 6p, 1 Diagram, 1 Chart
Publication Year :
2011

Abstract

Post-silicon validation poses unique challenges that bring-up tools must face, such as the lack of observability into the design, the typical instability of silicon bring-up platforms and the absence of supporting software (like an OS or debuggers). These challenges and the need to reach an optimal utilization of the expensive but very fast silicon platforms lead to unique design considerations like the need to keep the tool simple and to perform most of its operation on platform without interaction with the environment. In this paper we describe a variety of novel techniques optimized for the unique characteristics of the silicon platform. These techniques are implemented in Threadmill - a bare-metal exerciser targeting multi-threaded processors. Threadmill was used in the verification of the POWER7 processor with encouraging results. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
0738100X
Database :
Complementary Index
Journal :
DAC: Annual ACM/IEEE Design Automation Conference
Publication Type :
Conference
Accession number :
65316366