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Combined Nanoscale and Device-Level Degradation Analysis of SiO2 Layers of MOS Nonvolatile Memory Devices.

Authors :
Lanza, Mario
Porti, Marc
Nafría, Montserrat
Aymerich, Xavier
Sebastiani, Alessandro
Ghidini, Gabriella
Vedda, Anna
Fasoli, M.
Source :
IEEE Transactions on Device & Materials Reliability; Dec2009, Vol. 9 Issue 4, p529-536, 8p
Publication Year :
2009

Details

Language :
English
ISSN :
15304388
Volume :
9
Issue :
4
Database :
Complementary Index
Journal :
IEEE Transactions on Device & Materials Reliability
Publication Type :
Academic Journal
Accession number :
50141040
Full Text :
https://doi.org/10.1109/TDMR.2009.2027228