An A1N/Ultrathin A1GaN/GaN HEMT Structure for Enhancement-Mode Operation Using Selective Etching.

A novel device structure incorporating an ultrathin AIGaN barrier layer capped by an AIN layer in the source-drain access regions has been implemented to reliably control threshold voltage in AIGaN/GaN high-electron-mobility transistors. A recessed-gate structure has been used to decrease 2-D electron gas (2DEG) density under the gate, thus controlling threshold voltage while maintaining low on-resistance and high current density. The structure presented in this letter implements an ultrathin AIGaN structure grown by metal-organic chemical vapor deposition capped with AIN to maintain a high 2DEG density in the access regions. A selective wet etch using heated photoresist developer is used to selectively etch the AIN layer in the gate region to the AIGaN barrier. We have demonstrated a repeatable threshold voltage of +0.21 V with 4-nim AIGaN barrier layer thickness. [ABSTRACT FROM AUTHOR]