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A Single-Chip CMOS Bluetooth v2. 1 Radio SoC.

Authors :
Si, William W.
Weber, David
Abdollahi-Alibeik, Shahram
MeeLan Lee
Chang, Richard
Dogan, Hakan
Haitao Gan
Rajavi, Yashar
Luschas, Susan
Ozgur, Soner
Husted, Paul
Zargari, Masoud
Source :
IEEE Journal of Solid-State Circuits; Dec2008, Vol. 43 Issue 12, p2896-2904, 9p, 12 Black and White Photographs, 12 Diagrams, 1 Chart, 4 Graphs
Publication Year :
2008

Abstract

A single-chip Bluetooth v2.1-compliant CMOS radio SoC that supports Enhanced Data Rates is implemented in standard 0.13 μm CMOS technology. All functions of a Bluetooth radio are integrated in the SoC, including RF, analog and digital parts. The RF transceiver features a polar transmitter, a two-point modulated fractional-N synthesizer, a 500 kHz IF receiver with first order low-pass analog filtering, and a Δ∑ ADC with 74 dB dynamic range. The total SoC die area is 9.2 mm<superscript>2</superscript> with only 3.0 mm<superscript>2</superscript> for analog and RF circuits. The basic-rate radio power consumption is below 30 mA for both receive and transmit. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
00189200
Volume :
43
Issue :
12
Database :
Complementary Index
Journal :
IEEE Journal of Solid-State Circuits
Publication Type :
Academic Journal
Accession number :
35919351
Full Text :
https://doi.org/10.1109/JSSC.2008.2005741