Dynamic Reconfigurable Architecture Exploration based on Parameterized Reconfigurable Processor Model.

MLA

De Micheli, Giovanni, et al. “Dynamic Reconfigurable Architecture Exploration Based on Parameterized Reconfigurable Processor Model.” VLSI-SoC: Research Trends in VLSI & Systems on Chip, 2008, pp. 357–76. EBSCOhost, https://doi.org/10.1007/978-0-387-74909-9_20.

APA

De Micheli, G., Mir, S., Reis, R., Taniguchi, I., Sakanushi, K., Ueda, K., Takeuchi, Y., & Imai, M. (2008). Dynamic Reconfigurable Architecture Exploration based on Parameterized Reconfigurable Processor Model. In VLSI-SoC: Research Trends in VLSI & Systems on Chip (pp. 357–376). https://doi.org/10.1007/978-0-387-74909-9_20

Chicago

De Micheli, Giovanni, Salvador Mir, Ricardo Reis, Ittetsu Taniguchi, Keishi Sakanushi, Kyoko Ueda, Yoshinori Takeuchi, and Masaharu Imai. 2008. “Dynamic Reconfigurable Architecture Exploration Based on Parameterized Reconfigurable Processor Model.” In VLSI-SoC: Research Trends in VLSI & Systems on Chip, 357–76. doi:10.1007/978-0-387-74909-9_20.