40 MHz IF 1 MHz Bandwidth Two-Path Bandpass ΣΔ Modulator With 72 dB DR Consuming 16 mW.

A bandpass ΣΔ modulator with two time-interleaved second-order modulators and cross-coupled paths is described. Split zeros around the 40 MHz IF provide a signal band of! MHz with 72 dB^FS DR and 65.1 dB peak SNR. The circuit, integrated in a 0.18 μm CMOS technology, uses a 60 MHz clock per channel. Experimental results show that the in-band region is not affected by tones caused by mismatches and that a two-tones input causes an IMD signal of 68 dB_c. The power consumption is 16 mW with 1.8 V supply. [ABSTRACT FROM AUTHOR]