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OFF-State Avalanche-Breakdown-Induced ON-Resistance Degradation in Lateral DMOS Transistors.

Authors :
Chen, Jone F.
Lee, J. R.
Kuo-Ming Wu
Tsung-Yi Huang
Liu, C. M.
Hsu, S. L.
Source :
IEEE Electron Device Letters; Nov2007, Vol. 28 Issue 11, p1033-1035, 3p
Publication Year :
2007

Abstract

In this letter, ON-resistance R<subscript>ON</subscript> degradation in lateral double-diffused MOS transistors is observed when the device is operated under OFF-state avalanche-breakdown condition. Although interface states and positive oxide-trapped charges are created near the drain, interface-state generation is identified to be the main degradation mechanism. Technology computer-aided design simulation suggests that the driving force of damage is breakdown-induced hole injection. Experimental data show that R<subscript>ON</subscript> degradation has the tendency to saturate, in agreement with the saturation of interface-state generation and oxide-trapped charges data extracted by charge-pumping measurement. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
07413106
Volume :
28
Issue :
11
Database :
Complementary Index
Journal :
IEEE Electron Device Letters
Publication Type :
Academic Journal
Accession number :
27514010
Full Text :
https://doi.org/10.1109/LED.2007.907416