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A SIC PAIR GENERATOR FOR A BILBO ENVIRONMENT.

Authors :
VOYIATZIS, I.
KEHAGIAS, D.
Source :
Journal of Circuits, Systems & Computers; Oct2006, Vol. 15 Issue 5, p739-756, 18p, 13 Diagrams, 7 Charts
Publication Year :
2006

Abstract

Built-In Self Test (BIST) techniques are commonly used as an efficient alternative to external testing in today's high-complexity VLSI chips since they provide on-chip test pattern generation and response verification. Among the BIST techniques, Built-In Logic Block Observation (BILBO) has been widely used in practice. Test patterns generated by BILBO structures target the detection of stuck-at faults. It has been shown that most common failure mechanisms that appear into current CMOS VLSI circuits cannot be modeled as stuck-at faults. These mechanisms, modeled by sequential (i.e., stuck-open and delay) faults models, require the application of two-pattern tests (vector pairs) in the circuit-under-test inputs. Single Input Change (SIC) pairs are pairs of patterns where the second pattern differs from the first in only one bit and have been successfully used for two-pattern testing. In this paper we present the BILBO-oriented SIC pair Generator technique that extends BILBO in order to generate SIC pairs; in this way, sequential faults are also detected. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
02181266
Volume :
15
Issue :
5
Database :
Complementary Index
Journal :
Journal of Circuits, Systems & Computers
Publication Type :
Academic Journal
Accession number :
23726805
Full Text :
https://doi.org/10.1142/S0218126606003350