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Process Optimization for High Electron Mobility in nMOSFETs With Aggressively Scaled HfO2/Metal Stacks.

Process Optimization for High Electron Mobility in nMOSFETs With Aggressively Scaled HfO2/Metal Stacks.

Authors :
Narayanan, V.
Maitra, K.
Linder, B. P.
Paruchuri, V. K.
Gusev, E. P.
Jamison, P.
Frank, M. M.
Steen, M. L.
La Tulipe, D.
Arnold, J.
Carruthers, R.
Lacey, D. L.
Cartier, E.
Source :
IEEE Electron Device Letters; Jul2006, Vol. 27 Issue 7, p591-594, 4p, 4 Graphs
Publication Year :
2006

Abstract

The performance of aggressively scaled (1.4 nm < Tiny < 2.1 nm) self-aligned HfO<subscript>2</subscript>-based nMOSFETs with various metal gate electrodes (W, TaN, TiN, and TaSiN) is optimized. It is shown that high mobility values, competitive with oxynitride controls (SiON/poly-Si, T<subscript>inv</subscript> ∼ 1.8–2.1 nm), can be achieved. Detailed studies of the role of interface states, remote charges in the HfO<subscript>2</subscript> layer, interfacial layer regrowth, and nitrogen-induced charge lead to the conclusion that high-temperature-induced structural modifications near the SiO<subscript>2</subscript>/HfO<subscript>2</subscript> interface substantially improve the electron mobility. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
07413106
Volume :
27
Issue :
7
Database :
Complementary Index
Journal :
IEEE Electron Device Letters
Publication Type :
Academic Journal
Accession number :
21496836
Full Text :
https://doi.org/10.1109/LED.2006.876312