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Domain Specific Abstractions for the Development of Fast-by-Construction Dataflow Codes on FPGAs.
- Source :
- Chips; Dec2024, Vol. 3 Issue 4, p334-360, 27p
- Publication Year :
- 2024
-
Abstract
- FPGAs are popular in many fields but have yet to gain wide acceptance for accelerating HPC codes. A major cause is that whilst the growth of High-Level Synthesis (HLS), enabling the use of C or C++, has increased accessibility, without widespread algorithmic changes these tools only provide correct-by-construction rather than fast-by-construction programming. The fundamental issue is that HLS presents a Von Neumann-based execution model that is poorly suited to FPGAs, resulting in a significant disconnect between HLS's language semantics and how experienced FPGA programmers structure dataflow algorithms to exploit hardware. We have developed the high-level language Lucent which builds on principles previously developed for programming general-purpose dataflow architectures. Using Lucent as a vehicle, in this paper we explore appropriate abstractions for developing application-specific dataflow machines on reconfigurable architectures. The result is an approach enabling fast-by-construction programming for FPGAs, delivering competitive performance against hand-optimised HLS codes whilst significantly enhancing programmer productivity. [ABSTRACT FROM AUTHOR]
- Subjects :
- C++
SEMANTICS
ALGORITHMS
HARDWARE
LANGUAGE & languages
Subjects
Details
- Language :
- English
- ISSN :
- 26740729
- Volume :
- 3
- Issue :
- 4
- Database :
- Complementary Index
- Journal :
- Chips
- Publication Type :
- Academic Journal
- Accession number :
- 181939745
- Full Text :
- https://doi.org/10.3390/chips3040017