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An improved SiC SWITCH‐MOS with superior forward performance.

Authors :
Cheng, Junji
Zhong, Tao
Li, Huan
Li, Ping
Yi, Bo
Huang, Haimeng
Wang, Siliang
Hu, Qiang
Yang, Hongqiang
Source :
IET Power Electronics (Wiley-Blackwell); 11/25/2024, Vol. 17 Issue 15, p2584-2590, 7p
Publication Year :
2024

Abstract

An improved 4H‐SiC SBD‐wall‐integrated trench metal‐oxide‐semiconductor (SWITCH‐MOS) with n‐bury and split‐gate is proposed. Under the premise of ensuring breakdown voltage (BV), the n‐bury layer can smooth the path to current conduction, which reduces the specific on‐resistance (RON, SP) and improves static characteristics. Besides, the split‐gate is able to transform the gate‐drain capacitance (CGD) and improve the dynamic characteristics. Therefore, a superior forward performance that SWITCH‐MOS always craves is achieved. According to the simulation results, compared to the conventional SWITCH‐MOS with almost the same BV, the proposed one reduces the RON, SP by 57% and the CGD by 59% while gaining equally advanced reverse performance. Its reverse conduction voltage is only −1.78 V, but its figure of merit reaches 1.67 GW/cm2 and 65 mΩ·nC, which is attractive for the application in power inverters. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
17554535
Volume :
17
Issue :
15
Database :
Complementary Index
Journal :
IET Power Electronics (Wiley-Blackwell)
Publication Type :
Academic Journal
Accession number :
180972926
Full Text :
https://doi.org/10.1049/pel2.12808