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Erratum: Assessment of 180 nm double SOI technology for analog front-end design with back-gate voltage.

Authors :
Li, Y.
Liu, F.
Lu, B.
Li, Z.
Chen, S.
Zhang, C.
Zhu, H.
Yao, X.
Bu, J.
Wan, J.
Xu, Y.
Cristoloveanu, S.
Li, B.
Luo, J.
Ye, T.
Source :
Journal of Instrumentation; Oct2024, Vol. 19 Issue 10, p1-1, 1p
Publication Year :
2024

Details

Language :
English
ISSN :
17480221
Volume :
19
Issue :
10
Database :
Complementary Index
Journal :
Journal of Instrumentation
Publication Type :
Academic Journal
Accession number :
180117233
Full Text :
https://doi.org/10.1088/1748-0221/19/10/E10001