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Low charge noise quantum dots with industrial CMOS manufacturing.

Authors :
Elsayed, A.
Shehata, M. M. K.
Godfrin, C.
Kubicek, S.
Massar, S.
Canvel, Y.
Jussot, J.
Simion, G.
Mongillo, M.
Wan, D.
Govoreanu, B.
Radu, I. P.
Li, R.
Van Dorpe, P.
De Greve, K.
Source :
NPJ Quantum Information; 7/19/2024, Vol. 10 Issue 1, p1-9, 9p
Publication Year :
2024

Abstract

Silicon spin qubits are promising candidates for scalable quantum computers, due to their coherence and compatibility with CMOS technology. Advanced industrial processes ensure wafer-scale uniformity and high device yield, but traditional transistor processes cannot be directly transferred to qubit structures. To leverage the micro-electronics industry expertise, we customize a 300 mm wafer fabrication line for silicon MOS qubit integration. With careful optimization of the gate stack, we report uniform quantum dot operation at the Si/SiO<subscript>2</subscript> interface at mK temperature. We measure a record-low average noise with a value of 0.61 μ eVH z − 0.5 at 1 Hz and even below 0.1 μ eVH z − 0.5 for some operating conditions. Statistical analysis of the charge noise measurements show that the noise source can be described by a two-level fluctuator model. This reproducible low noise level, in combination with uniform operation of our quantum dots, marks CMOS manufactured spin qubits as a mature platform towards scalable high-fidelity qubits. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
20566387
Volume :
10
Issue :
1
Database :
Complementary Index
Journal :
NPJ Quantum Information
Publication Type :
Academic Journal
Accession number :
178527878
Full Text :
https://doi.org/10.1038/s41534-024-00864-3