A 256 Gb/s electronic−photonic monolithically integrated transceiver in 45 nm CMOS.

MLA

Li, Ang, et al. “A 256 Gb/s Electronic−photonic Monolithically Integrated Transceiver in 45 Nm CMOS.” Journal of Semiconductors, vol. 45, no. 7, July 2024, pp. 1–4. EBSCOhost, https://doi.org/10.1088/1674-4926/24050040.

APA

Li, A., Ma, Q., Xie, Y., Xiong, Y., Ma, Y., Liu, H., Jin, Y., Yang, M., Li, G., Yin, H., Zhu, M., Qu, Y., Wang, P., Wang, D., Li, W., Liu, L., Qi, N., & Li, M. (2024). A 256 Gb/s electronic−photonic monolithically integrated transceiver in 45 nm CMOS. Journal of Semiconductors, 45(7), 1–4. https://doi.org/10.1088/1674-4926/24050040

Chicago

Li, Ang, Qianli Ma, Yujun Xie, Yongliang Xiong, Yingjie Ma, Han Liu, Ye Jin, et al. 2024. “A 256 Gb/s Electronic−photonic Monolithically Integrated Transceiver in 45 Nm CMOS.” Journal of Semiconductors 45 (7): 1–4. doi:10.1088/1674-4926/24050040.