Design and Implementation of 5G Wireless Receiver Algorithms on the DSP Board.

With the advent of fifth Generation of cellular communication with its key features that superior over all the precedent generations. However, there are some challenges need to be taken into consideration. The main crucial part of communication system is the receiver and as it is known there are two main types of receivers which can be used to demodulate the signals and recover the transmitted data. In this paper, we used those two types of algorithm receivers which are the Non-Coherent and Coherent receivers. They are firstly demonstrated in details in accordance with receiver specification design and then moved to the practical side of implementation. In which novelty of our work is highlighted, by carrying out those different algorithms on the ADSP 21364 SHARC board where initially sampling the received DPSK signal, design the Bandpass and lowpass digital filtering respectively and all to be compiled by Analog Devices VisualDSP + + software that is programmed by C language prior to download to the ADSP Board chip. The same algorithm is followed in the frame synchronization for both of them by detecting the message through distinguishing the preamble of the message " + + + + " data which is before the 72 bytes (real message).Then that actual message will be stored and dumped to the memory and displayed to ensure from the received message whether it is corrupted with errors or not. However, it is clearly noticed that the Coherent receiver is more efficient than the Non-coherent, but it still a bit expensive because used double look-up tables for cosine and sine in IQ converter. Finally, coherent receiver with Costas loop algorithm was implemented as well to improve the previous differential detection scheme. [ABSTRACT FROM AUTHOR]