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Energy-Efficient Approximate Multiplier Design With Lesser Error Rate Using the Probability-Based Approximate 4:2 Compressor.

Authors :
Krishna, L. Hemanth
Sk, Ayesha
Rao, J. Bhaskara
Veeramachaneni, Sreehari
Sk, Noor Mahammad
Source :
IEEE Embedded Systems Letters; Jun2024, Vol. 16 Issue 2, p134-137, 4p
Publication Year :
2024

Abstract

This letter proposes novel approximate 4:2 compressors developed using input reordering circuits and input combination probabilities. The input reordering circuit is used to reduce the hardware complexity of the proposed designs. This letter proposes two designs of approximate 4:2 compressors. This compressor is used in designing an approximate multiplier. The proposed multiplier designs utilize less energy than the already published ones due to acceptable inaccurate output/precision, which are best suitable for image processing applications. The proposed multiplier designs MUL1, MUL2, MUL3, and MUL4 saves 22.75%, 21.95%, 11.57%, and 8.95% energy than the best of the existing design (Kong and Li, 2021). [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
19430663
Volume :
16
Issue :
2
Database :
Complementary Index
Journal :
IEEE Embedded Systems Letters
Publication Type :
Academic Journal
Accession number :
177558597
Full Text :
https://doi.org/10.1109/LES.2023.3280199