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Analysis of Phase-Locked Loop Filter Delay on Transient Stability of Grid-Following Converters.

Authors :
Zhang, Chenglin
Chen, Junru
Si, Wenjia
Source :
Electronics (2079-9292); Mar2024, Vol. 13 Issue 5, p986, 16p
Publication Year :
2024

Abstract

To ensure precise phase estimation within the q-axis of the phase-locked loop (PLL), integrating a filter into the q-axis loop is essential to mitigate grid-voltage harmonics. Nevertheless, the intrinsic delay characteristics of this filter impede PLL synchronization during significant grid disturbances. This study begins by developing mathematical models for three types of filters—moving-average filter (MAF) for eliminating odd harmonic components, dq-frame cascaded delayed signal cancellation (dqCDSC) filter, and notch filter (NF). Following the reduction in filter orders, a third-order nonlinear large-signal model of the PLL, incorporating an additional q-axis internal filter, is formulated. Using phase plane analysis, this study investigates the transient synchronism of the grid-following converter (GFL) and explores the influence of delay time constants from the three PLL filters on its behavior while delineating the boundaries of their basins of attraction. Theoretical findings indicate that, relative to the traditional SRF-PLL, incorporating an internal filter into the PLL compromises the transient synchronous stability of GFL. Specifically, greater filter delay time constants exacerbate the GFL's vulnerability to transient instability amid substantial grid disturbances. Hence, careful consideration is essential when using MAF-PLL and NF-PLL in situations demanding high synchronization stability. The theoretical analyses are validated using Matlab/Simulink to verify their accuracy. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
20799292
Volume :
13
Issue :
5
Database :
Complementary Index
Journal :
Electronics (2079-9292)
Publication Type :
Academic Journal
Accession number :
175988987
Full Text :
https://doi.org/10.3390/electronics13050986