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Design and analysis of fault-tolerant sequential logic circuits for safety-critical applications.
- Source :
- Bulletin of Electrical Engineering & Informatics; Feb2024, Vol. 13 Issue 1, p413-421, 9p
- Publication Year :
- 2024
-
Abstract
- Safety-critical systems used in applications that demand high levels of dependability, efficiency, and fault-tolerance often use sequential logic circuits in its design and implementation. The safety-critical digital system typically uses latches, flip-flops, and other memory elements, which are prone to the effects of natural faults and single event upsets (SEUs) caused by radiation-induced effects. The faults can lead to subsystem failures due to the continuous advancement in the realization of the small size transistor. To design a reliable digital-based system, it is essential to develop new faulttolerance approaches that are integrated into the design of sequential logic circuits. This work proposes a novel fault-tolerant approach based on the redundancy of sequential logic circuit, which consists of a variety of design components, D flip-flop storage elements linked to a fault injection unit, a duplicate modular redundancy, and data monitoring units with a switching circuit. The experimental simulation results using a five-state Markov chain analysis model prove that the proposed fault-tolerant system can achieve 0.99999998 for reliability of the fault detection coverage (C) which equal to 0.99999. Finally, we believe that using this new approach of fault-tolerance and redundancy would improve the dependability and reliability of next generation safety-critical applications. [ABSTRACT FROM AUTHOR]
Details
- Language :
- English
- ISSN :
- 20893191
- Volume :
- 13
- Issue :
- 1
- Database :
- Complementary Index
- Journal :
- Bulletin of Electrical Engineering & Informatics
- Publication Type :
- Academic Journal
- Accession number :
- 175865991
- Full Text :
- https://doi.org/10.11591/eei.v13i1.5713