Research on Implementation of a PWM Generation Algorithm for Train Stationary Stopping Frequency.

In industrial electronic equipment or communication equipment, a reference clock should be generated for stable operation of the equipment, which requires precise and stable reference frequency generation. As a method for generating this reference frequency, an analog method called PLL (phase locked-loop) has been devised and widely used. However, in order to make a more precise and stable reference frequency simple and economical, a DDS (direct digital synthesizer) has been developed. In this paper, we propose a stable and accurate method to generate a low frequency of the PWM method via pure logic circuit configuration without a microprocessor for digital reference frequency generation. Depending on the electronic communication equipment, the required reference frequency varies from a low frequency to a very high frequency. The reference frequency synthesis required in these frequency bands has been studied in various ways, but in industries such as railways, the low-frequency band based on the DDS method is used. In particular, it is very important to operate without a single operating error or failure in order to obtain information for stopping the train. Therefore, it is necessary to design a pure logic method that excludes a stored program type processor that minimizes the possibility of temporary interruption due to disturbance such as surge or high voltage. Therefore, through this study, the algorithm is implemented so that the duty ratio is output at 50:50, the circuit is configured so that two target frequencies are generated at the same time, and the performance is verified by generating the low-frequency band used for stopping the railway train. It was confirmed that the accuracy and stability were improved compared to the analog method used for stopping the railway train, and it was verified that the frequency resolution was superior to the similar results obtained in the digital frequency synthesis field so far. [ABSTRACT FROM AUTHOR]