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A High-Efficiency FPGA-Based ORB Feature Matching System.

Authors :
Huang, Bai-Cheng
Zhang, Yan-Jun
Source :
Journal of Circuits, Systems & Computers; 1/30/2024, Vol. 33 Issue 2, p1-19, 19p
Publication Year :
2024

Abstract

Feature extraction and matching are the basic procedures of the so-called Visual Odometer (VO), Simultaneous Localization and Mapping (SLAM) and many other image processing algorithms. Oriented features from accelerated segment test (FAST) and rotated binary robust independent elementary features (ORB) algorithm are widely used since they are computationally faster. In this paper, we proposed a method to generate a value for a feature, the value is called signature. In the matching step, we only compute Hamming distances of descriptors with the same signatures. Hence, the matching time is shortened. Compared with the original ORB algorithm, features to be matched dropped 69.63% on TUM datasets and 85.7% on VGG datasets by adopting our strategy. In addition, the precision is above 85% on both VGG and TUM datasets. We design a customized hardware architecture for ORB feature extraction and matching based on the proposed method. The hardware structure is implemented on Xilinx ZCU102 evaluation board. The clock frequency is set to 150 MHz. Our Field Programmable Gate Arrays (FPGA) system achieves 193 fps on 1 2 8 0 × 7 2 0 images with 1984 features on average and 314 fps on 6 4 0 × 4 8 0 images with 700 features on average, which is more efficient compared to the state-of-the-art works. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
02181266
Volume :
33
Issue :
2
Database :
Complementary Index
Journal :
Journal of Circuits, Systems & Computers
Publication Type :
Academic Journal
Accession number :
175283965
Full Text :
https://doi.org/10.1142/S0218126624500282