0.5-μm GaAs pHEMT 공정을 이용한4.4∼5.0 GHz 저잡음증폭기.

This paper discusses the design of a 4.4∼5.0 GHz low-noise amplifier (LNA) using a 0.5-μm GaAs pHEMT process. The transistor size was optimized to address the mismatch between optimal noise and input impedance owing to the unique noise sources of the transistor and parasitic characteristics, achieving a low noise figure with high input and noise optimal impedance matching without additional inter-stage loss components. The designed low-noise amplifier consumed 48 mW of power in the 4.4∼5.0 GHz range, demonstrating more than 23 dB of gain and a low noise figure of less than 0.9 dB. The size of the fabricated circuit was 1.8×1.4 mm². [ABSTRACT FROM AUTHOR]