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Designing low‐diameter interconnection networks with multi‐ported host‐switch graphs.

Authors :
Yasudo, Ryota
Nakano, Koji
Koibuchi, Michihiro
Matsutani, Hiroki
Amano, Hideharu
Source :
Concurrency & Computation: Practice & Experience; May2023, Vol. 35 Issue 11, p1-17, 17p
Publication Year :
2023

Abstract

Summary: A host‐switch graph was originally proposed as a graph that represents a network topology of a computer systems with 1‐port host computers and Δ‐port switches. It has been studied from both theoretical and practical aspects in terms of the diameter, the average shortest path length, and the performance of real applications. In recent high‐performance computing systems, however, a host computer is connected to multiple switches by using InfiniBand, NVSwitch, or Omni‐Path, and consequently they provide high bandwidths. Since a host‐switch graph cannot represent such systems, this article extends a host‐switch graph so that it can represent such systems. As a result, a host‐switch graph can include multi‐ported hosts. Furthermore, we propose to use multi‐port hosts for reducing the diameter. We show that the diameter minimization is equivalent to solving the degree diameter problem for bipartite graphs of diameter three. Our experimental results show that we can drastically reduce the diameter as well as increasing the bandwidth and improves performance of MPI applications by up to 162% as compared with networks with single‐ported hosts. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
15320626
Volume :
35
Issue :
11
Database :
Complementary Index
Journal :
Concurrency & Computation: Practice & Experience
Publication Type :
Academic Journal
Accession number :
163160582
Full Text :
https://doi.org/10.1002/cpe.6115