Demonstration of Multiply-Accumulate Operation With 28 nm FeFET Crossbar Array.

This letter reports a linear multiply-accumulate (MAC) operation conducted on a crossbar memory array based on 28nm high-k metal gate (HKMG) Complementary Metal Oxide Semiconductor (CMOS) and ferroelectric field effect transistor (FeFET). The fabrication is conducted at GlobalFoundries with their standard 28nm technology. The crossbar arrays show a 100% yield in MAC operation on a 300mm wafer. The arrays were divided into ${8}\times {8}$ segments. The FeFET crossbar arrays were fabricated with access transistors, current-limiter transistors and a current-mode analog-to-digital converter (ADC) on the same wafer. Finally, the data retention characteristics reveal excellent data retention characteristics up to ${5}\times {10} ^{{4}}$ seconds, which makes this memory array suitable for carrying out MAC operations in inference engine applications. [ABSTRACT FROM AUTHOR]