Tunnel FET and MOSFET Hybrid Integrated 9T SRAM with Data-Aware Write Technique for Ultra-Low Power Applications.

MLA

Lu, Wenjuan, et al. “Tunnel FET and MOSFET Hybrid Integrated 9T SRAM with Data-Aware Write Technique for Ultra-Low Power Applications.” Electronics (2079-9292), vol. 11, no. 20, Oct. 2022, p. 3392–N.PAG. EBSCOhost, https://doi.org/10.3390/electronics11203392.

APA

Lu, W., Lu, Y., Dong, L., Peng, C., Wu, X., Lin, Z., & Chen, J. (2022). Tunnel FET and MOSFET Hybrid Integrated 9T SRAM with Data-Aware Write Technique for Ultra-Low Power Applications. Electronics (2079-9292), 11(20), 3392–N.PAG. https://doi.org/10.3390/electronics11203392

Chicago

Lu, Wenjuan, Yixiao Lu, Lanzhi Dong, Chunyu Peng, Xiulong Wu, Zhiting Lin, and Junning Chen. 2022. “Tunnel FET and MOSFET Hybrid Integrated 9T SRAM with Data-Aware Write Technique for Ultra-Low Power Applications.” Electronics (2079-9292) 11 (20): 3392–N.PAG. doi:10.3390/electronics11203392.