Design of a Capacitorless DRAM Based on Storage Layer Separated Using Separation Oxide and Polycrystalline Silicon.

MLA

Kim, Geon Uk, et al. “Design of a Capacitorless DRAM Based on Storage Layer Separated Using Separation Oxide and Polycrystalline Silicon.” Electronics (2079-9292), vol. 11, no. 20, Oct. 2022, p. 3365–N.PAG. EBSCOhost, https://doi.org/10.3390/electronics11203365.

APA

Kim, G. U., Yoon, Y. J., Seo, J. H., Lee, S. H., Park, J., Kang, G. E., Heo, J. H., Jang, J., Bae, J.-H., Lee, S.-H., & Kang, I. M. (2022). Design of a Capacitorless DRAM Based on Storage Layer Separated Using Separation Oxide and Polycrystalline Silicon. Electronics (2079-9292), 11(20), 3365–N.PAG. https://doi.org/10.3390/electronics11203365

Chicago

Kim, Geon Uk, Young Jun Yoon, Jae Hwa Seo, Sang Ho Lee, Jin Park, Ga Eon Kang, Jun Hyeok Heo, et al. 2022. “Design of a Capacitorless DRAM Based on Storage Layer Separated Using Separation Oxide and Polycrystalline Silicon.” Electronics (2079-9292) 11 (20): 3365–N.PAG. doi:10.3390/electronics11203365.