CMOS Cascode Low Noise Amplifier (CCLNA) Design for Nanosensor Applications.

A design of Cascode Low Noise Amplifier (CCLNA) circuit is proposed using standard 0.18 µm millimeter wave (mmW) CMOS technology. The proposed CMOS CCLNA circuit has achieved a maximum conversion gain of 17.4 dB, NF of dB and a power of 22.3 mW at mmW K_a band. The input and output reflection coefficients are well matched with less than – 10 dB at the K_a band frequency with good Voltage Standing Wave Ratio (VSWR). The reverse transmission coefficient S₁₂ is less than – 12 dB, indicating that the LNA has improved isolation between input and output, the stability factor is greater than one for the amplifier realization. The SoC-based CCLNA design for circuit level examination with analytical equations also proved that the simulation outcomes were prone to the design suitable for nanoelectronic applications for an output power of 2 dBm, transition frequency (fT) of 64 GHz and maximum operation [ABSTRACT FROM AUTHOR]