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Influence of Capping Layer on Threshold Voltage for HKMG FinFET With Short Channel.

Authors :
Cai, Han-Lun
Li, Run-Ling
Li, Zhao-Yang
Li, Zhong-Hua
Jiang, Yu-Long
Lu, Fang
Source :
IEEE Transactions on Electron Devices; Sep2022, Vol. 69 Issue 9, p4810-4814, 5p
Publication Year :
2022

Abstract

The influence of SiO2 and SiNx capping layer on threshold voltage (${V}_{t}$) for FinFET with TiAl-based metal gate (MG) is studied. After metal gate-stack formation, SiNx capping is revealed to be able to serve as a new N source, resulting in the diffusion of N into the effective work function (EWF) TiNx layer. Correspondingly, the accumulation of N in the TiNx layer is demonstrated to be able to lower the EWF for both n- and p-FinFETs. Compared to SiO2 capping, SiNx capping can induce $\sim 100$ –150 mV ${V}_{t}$ lowering for short n- and p-FinFETs. No obvious ${V}_{t}$ shift is found for long-channel devices. [ABSTRACT FROM AUTHOR]

Subjects

Subjects :
LOGIC circuits
THRESHOLD voltage

Details

Language :
English
ISSN :
00189383
Volume :
69
Issue :
9
Database :
Complementary Index
Journal :
IEEE Transactions on Electron Devices
Publication Type :
Academic Journal
Accession number :
159195060
Full Text :
https://doi.org/10.1109/TED.2022.3191993