Backside power delivery scheme boosts logic ICs.

Imec has presented an experimental demonstration of a routing scheme for logic ICs with backside power delivery enabled through nano-through-silicon-vias (nTSVs) landing on buried power rails (BPRs). The concept of backside power delivery allows the decoupling of the power delivery network from the signalling metallisation scheme in logic ICs, hence alleviating routing congestion in the back-end-of-line and delivering a power performance benefit. [Extracted from the article]