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Simulation Study of Single-Event Effects for the 4H-SiC VDMOSFET With Ultralow On-Resistance.

Authors :
Zhou, Jian-Cheng
Wang, Ying
Li, Xing-Ji
Yang, Jian-Qun
Bao, Meng-Tian
Cao, Fei
Source :
IEEE Transactions on Electron Devices; Jun2022, Vol. 69 Issue 6, p3283-3289, 7p
Publication Year :
2022

Abstract

Silicon carbide (SiC) vertical-diffused metal oxide field transistor (VDMOSFET) is an important power device for aerospace application. However, it is sensitive to heavy particles radiation in space which can cause catastrophic single-event effects (SEEs). In this article, a method of SEE hardening at a high linear energy transfer (LET) value range is studied to the 1.2 kV-rated SiC VDMOSFET by the 2-D numerical simulator SILVACO TCAD. Simulation results illustrate that, compared with the VDMOSFET which only has four buffer (FB-VDMOSFET) layers, the improved MOSFET could increase the abilities of single-event burnout (SEB) and the single-event gate rupture (SEGR) of the device effectively. At the same time, the proposed MOSFET has the lower specific ON-resistance (${R}_{\text {on, sp}}$) at room temperature. As a result, the gate oxide of the FB-VDMOSFET has reached 7.5 MV/cm and the maximum temperature reached 2480 K at a voltage of 600 V and an LET value of 0.5 pC/ $\mu \text{m}$. However, the maximum temperature of the improved VDMOSFET is 2150 K when ${V}_{\mathrm {DS}}$ = 950 V. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
00189383
Volume :
69
Issue :
6
Database :
Complementary Index
Journal :
IEEE Transactions on Electron Devices
Publication Type :
Academic Journal
Accession number :
157582752
Full Text :
https://doi.org/10.1109/TED.2022.3166122