A 12.1 TOPS/W Quantized Network Acceleration Processor With Effective-Weight-Based Convolution and Error-Compensation-Based Prediction.

MLA

Mo, Huiyu, et al. “A 12.1 TOPS/W Quantized Network Acceleration Processor With Effective-Weight-Based Convolution and Error-Compensation-Based Prediction.” IEEE Journal of Solid-State Circuits, vol. 57, no. 5, May 2022, pp. 1542–57. EBSCOhost, https://doi.org/10.1109/JSSC.2021.3113569.

APA

Mo, H., Zhu, W., Hu, W., Li, Q., Li, A., Yin, S., Wei, S., & Liu, L. (2022). A 12.1 TOPS/W Quantized Network Acceleration Processor With Effective-Weight-Based Convolution and Error-Compensation-Based Prediction. IEEE Journal of Solid-State Circuits, 57(5), 1542–1557. https://doi.org/10.1109/JSSC.2021.3113569

Chicago

Mo, Huiyu, Wenping Zhu, Wenjing Hu, Qiang Li, Ang Li, Shouyi Yin, Shaojun Wei, and Leibo Liu. 2022. “A 12.1 TOPS/W Quantized Network Acceleration Processor With Effective-Weight-Based Convolution and Error-Compensation-Based Prediction.” IEEE Journal of Solid-State Circuits 57 (5): 1542–57. doi:10.1109/JSSC.2021.3113569.