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P‐29: A 5.4Gbps Intra‐Panel Interface with Advanced Integrated‐Stream Protocol for Thin‐Film Transistor Liquid‐Crystal Display Applications.

Authors :
Chang, Yi-Hsiang
Chang, Shu-Hao
Wang, Hung-Chi
Chen, Ya-Fang
Yang, Chih-Hsiang
Source :
SID Symposium Digest of Technical Papers; May2021, Vol. 52 Issue 1, p1170-1172, 3p
Publication Year :
2021

Abstract

This paper describes coding detection, adaptive equalizer, and bit error detection for integrated‐stream protocol (iSP) interface. Coding detection is used for evaluating the data format to ensure the correctness of coding. Adaptive equalizer can adjust equalize step automatically at receiver to compensate channel attenuation. A bit error detector counts the number of error bits in the iSP data stream. An iSP source driver for a TFT‐LCD is presented in this paper. The source driver operates at a rate of up to 5.4Gbps and achieves a timing margin of 0.5UI and a voltage swing of 0.18V. [ABSTRACT FROM AUTHOR]

Subjects

Subjects :
TRANSISTORS
DETECTORS
VOLTAGE

Details

Language :
English
ISSN :
0097966X
Volume :
52
Issue :
1
Database :
Complementary Index
Journal :
SID Symposium Digest of Technical Papers
Publication Type :
Academic Journal
Accession number :
151134838
Full Text :
https://doi.org/10.1002/sdtp.14903