A power amplifier with bandwidth expansion and linearity enhancement in 130 nm complementary metal‐oxide‐semiconductor process.

A power amplifier with bandwidth expansion and linearity enhancement in 130 nm complementary metal‐oxide‐semiconductor (CMOS) process is presented. A LC connected dual‐resonant network is proposed to achieve good broadband performance and high out‐band rejection capability simultaneously. Furthermore, the advanced multiple‐gated transistor technique is employed to cancel out odd‐order intermodulation and harmonic distortions. The PA is implemented in 130 nm CMOS process with an area of 1.17 mm × 0.92 mm. Measurement results demonstrate that the PA exhibits a peak power gain of 8 dB with a relative bandwidth of 38% while maintaining a low reflection coefficient of −23.2 dB, maximum saturation output power of 15.6 dBm, maximum OP1dB and OIP3 of 14.3 dBm and 19 dBm, and a peak power added efficiency of 21.3%, respectively. In addition, an out‐band rejection of 20 dB and 23.2 dB at 6.1 GHz and 14 GHz are measured. [ABSTRACT FROM AUTHOR]