Research and implementation of low-latency forward error correction coding for HPC interconnection network.

At present, the port rate of the mainstream high-performance interconnection network reaches 100~400 Gbps, and the single channel rate reaches 25~50 Gbps. For the data transmission at this rate, Forward Error Correction (FEC) coding is a necessary technology to improve the reliability. The Ethernet international standard IEEE 802. 3 uses Forward Error Correction codes RS(528,514) and RS(544,514), but these two code types are difficult to meet the performance requirements of high-performance interconnect networks in terms of low latency. Firstly, this paper analyzes the encoding and decoding structures of RS code and quantitatively studies the relationship between RS code type parameters and encoding and decoding delays. Secondly, a new coding type RS(271,257) for low-latency high-performance interconnection network is proposed, and its advantages and disadvantages in bandwidth consumption and error correction capability are compared. Finally, based on RS(271,257), this paper implements the network coding sub-layer and performs the resource consumption evaluation and delay performance simulation. Considering the factors of resource consumption, error correction ability and delay performance, RS (271, 257) is an ideal low-latency forward error correction coding type, which can meet the design requirements of the current HPC-oriented low-latency high-performance interconnection network coding sub-layer. [ABSTRACT FROM AUTHOR]