Efficient implementation and performance improvement of three‐phase EPLL under non‐ideal grid conditions.

In this study, an advanced phase‐locked‐loop (PLL), which has a simple structure and a low computational burden is proposed. The proposed PLL also improves the dynamic performance and the filtering capability of the conventional three‐phase enhanced‐PLL (3pEPLL) significantly. The conventional 3pEPLL operates three individual EPLL blocks for each phase voltage and a fourth EPLL for estimation of the magnitude, frequency, and phase angle, which considerably increases the structural complexity and computational burden. However, the proposed PLL called enhanced‐3pEPLL (E2 PLL) employs only two single‐phase EPLL modules in its pre‐filtering stage. A moving‐average‐filter (MAF) is also supplemented on the error signal path of these EPLL modules, which allows smoother estimation of the magnitude, frequency, and phase angle, and improves the filtering capability of the EPLLs. Unlike the conventional 3pEPLL, the proposed E2 PLL employs a quasi‐type‐1 PLL (QT1‐PLL) to estimate the magnitude, frequency, and phase information of the fundamental grid voltage. The structure of QT1‐PLL is similar to a type‐1 PLL, which offers a low transient response time. The small‐signal model of the proposed PLL is derived for stability analysis and parameter design procedure. The effectiveness of the E2 PLL is verified owing to experimental results and comparison with the conventional 3pEPLL and QT1‐PLL. [ABSTRACT FROM AUTHOR]