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A 0.1-pJ/b/dB 1.62-to-10.8-Gb/s Video Interface Receiver With Jointly Adaptive CTLE and DFE Using Biased Data-Level Reference.

Authors :
Lee, Jinhyung
Lee, Kwangho
Kim, Hyojun
Kim, Byungmin
Park, Kwanseo
Jeong, Deog-Kyoon
Source :
IEEE Journal of Solid-State Circuits; Aug2020, Vol. 55 Issue 8, p2186-2195, 10p
Publication Year :
2020

Abstract

In this article, a 1.62-to-10.8-Gb/s video interface receiver with jointly adaptive equalization is presented. Sign–sign least-mean-squares (SSLMS) algorithm is applied to adaptation for not only a decision feedback equalizer (DFE) but also a continuous-time linear equalizer (CTLE) to unify the adaptation methods. This approach facilitates concurrent adaptation that results in short adaptation time and also reduces the extra hardware and power consumption. An average value of fourth- and fifth-post-cursors is used as an indicator for CTLE adaptation, and the validity is substantiated by numerical analysis and simulation. Furthermore, the concept of a biased data-level reference (dLev) is proposed and analyzed to alleviate insufficient adaptation of the SSLMS algorithm in the presence of pre-cursor inter-symbol interference (ISI). The proposed dLev is acquired by simply adjusting up and down ratios of the dLev update equation. The prototype test chip is implemented in 65-nm CMOS technology and occupies an active area of 0.174 mm2. The proposed adaptive equalizers compensate for the channel loss of up to 34 dB at 10.8 Gb/s. Total power consumption of the receiver is 37.2 mW at 10.8 Gb/s, and the figure of merit (energy efficiency per channel loss at Nyquist frequency) of 0.1 pJ/b/dB is achieved. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
00189200
Volume :
55
Issue :
8
Database :
Complementary Index
Journal :
IEEE Journal of Solid-State Circuits
Publication Type :
Academic Journal
Accession number :
144753258
Full Text :
https://doi.org/10.1109/JSSC.2020.2987690