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Multichip thinning technology with temporary bonding for multichip-to-wafer 3D integration.

Authors :
Sungho Lee
Rui Liang
Yuki Miwa
Hisashi Kino
Takafumi Fukushima
Tetsu Tanaka
Source :
Japanese Journal of Applied Physics; 2020, Vol. 59 Issue SB, p1-1, 1p
Publication Year :
2020

Abstract

Thinning defects such as chipping and cracking caused by multichip lapping and chemical mechanical polishing processes were evaluated for through-silicon via formation based on via-last/backside via technologies. Two types of temporary adhesives with different Young's moduli were used in this multichip-to-wafer (MC2W) approach for comparison. Impact of the temporary bonding conditions and temporary adhesive properties on the multichip thinning failure was discussed for achieving high-yield MC2W 3D integration. When a temporary adhesive with a low Young's modulus is employed, the space between adjacent chips and the chip sidewall covered with adhesive were found to be critical parameters to the multichip thinning without chipping and cracking. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
00214922
Volume :
59
Issue :
SB
Database :
Complementary Index
Journal :
Japanese Journal of Applied Physics
Publication Type :
Academic Journal
Accession number :
141704667
Full Text :
https://doi.org/10.7567/1347-4065/ab4f3c