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A Fully Integrated 384-Element, 16-Tile, $W$ -Band Phased Array With Self-Alignment and Self-Test.
- Source :
- IEEE Journal of Solid-State Circuits; Sep2019, Vol. 54 Issue 9, p2419-2434, 16p
- Publication Year :
- 2019
-
Abstract
- This paper describes the design and implementation of a scalable $W$ -band phased-array system, with built-in self-alignment and self-test, based on an RFIC transceiver chipset manufactured in the TowerJazz 0.18- $\mu \text{m}$ SiGe BiCMOS technology with $f_{T}/f_{\text {MAX}}$ of 240/270 GHz. The RFIC integrates 24 phase-shifter elements (16TX/8RX or 8TX/16RX) as well as direct up- and down-converters, phase-locked loop with prime-ratio frequency multiplier, analog baseband, beam lookup memory, and diagnostic circuits for performance monitoring. Two organic printed circuit board (PCB) interposers with integrated antenna sub-arrays are designed and co-assembled with the RFIC chipsets to produce a scalable phased-array tile. Tiles are phase-aligned to one another through a daisy-chained local oscillator (LO) synchronization signal. Statistical analysis of the effects of LO misalignment between tiles on beam patterns is presented. Sixteen tiles are combined onto a carrier PCB to create a 384-element (256TX/128RX) phased-array system. A maximum saturated effective isotropic radiated power (EIRP) of 60 dBm (1 kW) is measured at boresight for the 256 transmit elements. Wireless links operating at 90.7 GHz using a 16-QAM constellation at a reduced EIRP of 52 dBm produced data rates beyond 10 Gb/s for an equivalent link distance in excess of 250 m. [ABSTRACT FROM AUTHOR]
Details
- Language :
- English
- ISSN :
- 00189200
- Volume :
- 54
- Issue :
- 9
- Database :
- Complementary Index
- Journal :
- IEEE Journal of Solid-State Circuits
- Publication Type :
- Academic Journal
- Accession number :
- 138276030
- Full Text :
- https://doi.org/10.1109/JSSC.2019.2928694