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Ultrathin EOT (0.67 nm) High-k Dielectric on Ge MOSFET Using Y Doped ZrO2 With Record-Low Leakage Current.

Authors :
Lee, Tae In
Ahn, Hyun Jun
Kim, Min Ju
Shin, Eui Joong
Lee, Seung Hwan
Shin, Sung Won
Hwang, Wan Sik
Yu, Hyun-Yong
Cho, Byung Jin
Source :
IEEE Electron Device Letters; Apr2019, Vol. 40 Issue 4, p502-505, 4p
Publication Year :
2019

Abstract

An advanced gate stack of Y-doped ZrO2 high-k dielectric is demonstrated for Ge MOSFETs. ZrO2 is implemented due to its high-permittivity (high-k) value, and additional Y is doped into the ZrO2 to enhance interfacial properties. The gate stack of ZrO2 with 2~4% Y doping shows improved electrical properties, achieving an EOT of 0.67 nm, a low interface trap density ($\text{D}_{\textsf {it}}$) of $\textsf {1.2}\,\,\times \,\,\textsf {10}^{\textsf {12}}$ eV−1cm−2, a record-low gate leakage current of $\textsf {1.14}\,\,\times \,\,\textsf {10}^{-\textsf {7}}$ A/cm2 at −1V, and peak mobility of $\textsf {68 cm}^{\textsf {2}}/\textsf {V}\cdot \textsf {s}$. The proposed gate stack would enhance transistor speed and save power consumption of Ge MOSFETs. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
07413106
Volume :
40
Issue :
4
Database :
Complementary Index
Journal :
IEEE Electron Device Letters
Publication Type :
Academic Journal
Accession number :
135773303
Full Text :
https://doi.org/10.1109/LED.2019.2899139