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Low-Voltage, Flexible IGZO Transistors Gated by PSSNa Electrolyte.
- Source :
- IEEE Electron Device Letters; Sep2018, Vol. 39 Issue 9, p1334-1337, 4p
- Publication Year :
- 2018
-
Abstract
- A carving, cutting, and flip-chip bonding process is proposed for the fabrication of flexible electric double layer transistors (EDLTs) with low cost. Solution processed poly(styrenesulfonic acid sodium salt) is used as a gate dielectric. The large EDL-specific capacitance ($4.5~\mu \text{F}$ /cm2 at 20 Hz) can induce very high charge carrier density in the InGaZnO (IGZO) channel layer, enabling the EDLTs to operate at a single-battery-drivable low voltage of 1.0 V with a high on-current of 10−4A. The effect of IGZO layer thickness on the performance of EDLTs was investigated. The flexible EDLT with optimized IGZO thickness of 100 nm has achieved a high on/off ratio of $1.4 \times 10^{7}$ , a low threshold voltage of 0.51 V, a saturated field-effect mobility of 1.14 cm2/Vs, and high positive gate bias stress stability. Furthermore, the achieved subthreshold swing, 76 mV/dec, is very close to the theoretical ideal minimum value. [ABSTRACT FROM AUTHOR]
- Subjects :
- FIELD-effect transistors
ELECTROLYTES
DIELECTRICS
Subjects
Details
- Language :
- English
- ISSN :
- 07413106
- Volume :
- 39
- Issue :
- 9
- Database :
- Complementary Index
- Journal :
- IEEE Electron Device Letters
- Publication Type :
- Academic Journal
- Accession number :
- 131487550
- Full Text :
- https://doi.org/10.1109/LED.2018.2862910